Mirjana Stojilovic

EPFL IC IINFCOM PARSA
INJ 235 (Bâtiment INJ)
Station 14
1015 Lausanne

Web site:  Web site:  https://parsa.epfl.ch/

Web site:  Web site:  https://ssc.epfl.ch

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Administrative data

Publications

Infoscience publications

Other publications

Teaching & PhD

Teaching

Computer Science

Communication Systems

Semester and Diploma Projects

If you are passionate about hardware security, FPGAs, design automation, machine learning, side-channel attacks, cloud computing, parallel CPU/FPGA/GPU computing, or embedded system design, contact me.

Our current project ideas can be found on this link.

These are only some topics we'd be happy to work on. If interested to hear more, don't hesitate to contact me; I'd be glad to try to find other topics that would be of mutual interest.

Semester projects and MSc Theses completed in my research group:

2021/22:
-- MSc Thesis, David Spielmann: Routing delay sensors for remote power side-channel attacks on FPGAs
-- Lucien Bart: Evaluating and enhancing the performance of MetriSCA Library
-- Pierre Colson: Remote attacks on FPGA clock networks
-- David Dervishi: FPGA-to-CPU fault-injection attacks
-- David Spielmann: Power side-channel analysis on remotely accessible FPGAs

2020/21:
-- Anton Hosgood: Titan benchmark suite: From VTR to Xilinx FPGAs
-- Léa Michelaud: Threshold Implementation of a Block Cipher
-- Arthur Passuello: Remote power side-channel disassembly attacks on ARM-based FPGA SoCs
-- Cédric Holzl: FPGA routing with limited crosstalk side-channel attack opportunities

2019/20:
-- MSc Thesis, Hédi Fendri: ML-based side-channel analysis and disassembly of hardware Root of Trust (Recipient of the Omega Student Award)
-- Cédric Holzl: Secure routing against crosstalk-attacks on FPGAs
-- Morten Petersen: Xilinx Series-7 FPGA Routing Architecture Analysis
-- Gaietan Renault: Experimental comparison of voltage sensors on FPGAs
-- Markus Ding: Parallel FPGA Router compatible with VPR 8.0
-- Dorian Ros: Mutual Information analysis of an FPGA implementation of the AES encryption algorithm
-- Mathieu Caboche: GPU acceleration of electromagnetic time-reversal algorithm
-- Sacha Coppey: Design and performance evaluation of dataflow-enabled domain-specific CGRAs
-- Ahmed Ben Haj Yahia: Customizing FPGA Designs using RapidWright

2018/19:
-- Alexandre Abbey: Differential power analysis attack on an FPGA implementation of AES algorithm
-- Robin Mamie: Designing a multicycle processor in Chisel
-- Frédéric Gessler: A shared-memory parallel implementation of the RePlAce global cell placement algorithm
-- Markus Ding: FPGA Trojan for controlled voltage drop injection
-- Ugo Damiano: Step response characterization of FPGA power delivery networks

2017/18:
-- MSc Thesis, Dario Korolija: FPGA-based hardware acceleration of FPGA routing
-- Alex Ferragni: Attack on Altera FPGAs using bitstreams
-- Martin Chatton: Parallel FPGA routing using recursive net-partitioning

Courses

Fundamentals of digital systems

Welcome to the introductory course in digital design and computer architecture. In this course, we will embark on a journey into the world of digital systems, exploring the fundamental principles and concepts that underpin modern computing technology.