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David Atienza Alonso
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BIOGRAPHY
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David Atienza Alonso is Professor and Director of the Embedded Systems Laboratory (ESL) at the Institute of Electrical Engineering within the School of Engineering (STI) of EPFL, Switzerland. He also holds the position of Adjunct Professor at the Computer Architecture and Automation Department of Complutense University of Madrid (UCM), Spain. Additionally, he is currently Scientific Counselor of long-time research of Inter-University Micro-Electronics Center Nederland (IMEC-NL), Holst Centre, Eindhoven, The Netherlands. He received his M.Sc. and Ph.D. degrees in Computer Science from Complutense University, Madrid, Spain, and Inter-University Micro-Electronics Center (IMEC), Leuven, Belgium, in 2001 and 2005, respectively.
His research interests focus on system-level thermal- and energy-aware design methodologies for multi-core computing systems and high-performance embedded systems, including new modelling and control frameworks to develop dynamic thermal management techniques for Multi-Processor System-on-Chip, novel architectures for logic and memories in forthcoming nano-scale electronics, dynamic memory management and memory hierarchy optimizations for embedded systems, Networks-on-Chip interconnection design and wireless body sensor networks design.
In these fields, he is co-author of more than 160 publications in prestigious journals and international conferences, such as, IEEE TCAD, IEEE Micro, IEEE T-VLSI Systems, ACM TODAES, Elsevier-Integration: The VLSI Journal, DAC, ICCAD, DATE, ASP-DAC, etc. He received as co-author the "2009 Best Technical Paper Award" at the 17th IEEE/IFIP Very Large Scale Integration Conference (VLSI-SoC)" and nominations for the "2004 IEEE/ACM Design Automation Conference (DAC) - Best Paper Award" and "2006 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - Best Paper Award" and "2010 IEEE/ACM International Conference on High Performance Computing & Simulation (HPCS) - Best Student Paper Award". He is also the recipient of an Outstanding Research Award of Oracle in 2011 in the area of stable global thermal-aware control for enterprise computer servers. He is an Associate Editor of IEEE Transactions on CAD (in the area of System-Level Design) and Elsevier Integration: The VLSI Journal, and member of the Technical Program Committee of the DATE, DAC, ASP-DAC, ICCAD, GLSVLSI, ISVLSI, VLSI-SoC, RTAS, SBCCI and PATMOS conferences among others. He has been General Chair of the GLSVLSI 2011 and the VLSI-SoC 2010 conferences. He is an elected member of the Executive Committee of the IEEE Council of Electronic Design Automation (CEDA) since 2008, and member of the Board of Governors of the IEEE Circuits and Systems Society (CASS) since 2010.
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MISSION
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The Embedded Systems Laboratory (ESL) focuses its research work on the definition of reliability-aware design, optimization methodologies and system-level exploration tools for high-performance embedded systems and nano-scale Multi-Processor System-on-Chip (MPSoC) architectures. The main research lines within the ESL activities include, but are not restricted to, the following topics:
• Thermal and reliability exploration frameworks and management approaches for MPSoCs and embedded systems, both at microarchitectural and system level.
• Exploration of synergies between hardware and software components to exploit design trade-offs (area, performance, power) in SoC architectures.
• New techniques for memory hierarchy optimization and the design of dynamic memory management mechanisms in multimedia SoC platforms.
• System-level design and energy management approaches for wireless sensor networks.
• Fault-tolerant circuits and design methodologies for nano-scale electronics made from carbon nanotubes and/or silicon nanowires.
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MAIN PUBLICATIONS
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Development and Evaluation of Multi-Lead Wavelet-Based ECG Delineation Algorithms for Embedded Wireless Sensor Nodes, Francisco Rincon, Joaquin Recas, Nadia Khaled, David Atienza, IEEE Transactions on Transactions on Information Technology in BioMedicine (TITB), Vol. 16, Nr. 11, pp. 1-9, IEEE Press, ISSN: 0018-9294, November 2011.
Energy-Efficient Multi-Objective Thermal Control for Liquid-Cooled 3D Stacked Architectures, Mohamed M. Sabry, Ayse K. Coskun, David Atienza, Tajana Simunic, Thomas Brunschwiler, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (T-CAD), Vol. 30, Nr. 11, pp. 2015-2029, IEEE Press, ISSN: 0278-0070, November 2011
Compressed Sensing for Real-Time Energy-Efficient ECG Compression on Wireless Body Sensor Nodes, Hossein Mamaghanian, Nadia Khaled, David Atienza, Pierre Vandergheynst, IEEE Transactions on Biomedical Engineering (TBME), Vol. 58, Nr. 12, pp. 120-129, IEEE Press, ISSN: 0018-9294, September 2011.
A Mapping Flow for Dynamically Reconfigurable Multi-Core System-on-Chip Design, Ivan Beretta, Vincenzo Rana, David Atienza, Donatella Sciuto, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (T-CAD), Vol. 30, Nr. 8, pp. 1211-1224, IEEE Press, ISSN: 0278-0070, August 2011.
Attaining Single-Chip, High-Performance Computing Through 3D Systems with Active Cooling, Ayse K. Coskun, David Atienza, Mohamed Sabry, Jie Meng, IEEE Micro Magazine, Vol. 31, Issue. 4, pp. 63 – 73, IEEE Press, ISSN: 0272-1732, July/August 2011.
Thermal Balancing Policy for Multiprocessor Stream Computing Platforms, Fabrizio Mulas, David Atienza, Andrea Acquaviva, Salvatore Carta, Luca Benini, Giovanni De Micheli, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 28, Nr. 12, pp. 1870-1882, IEEE Press, ISSN: 0278-0070, December 2009.
Processor Speed Control with Thermal Constraints, Almir Mutapcic, Stephen Boyd, Srinivasan Murali, David Atienza, Giovanni De Micheli, Rajesh Gupta, IEEE Transactions on Circuits and Systems: Part I (TCAS-I), Vol. 56, Nr. 9, pp. 1994-2008, IEEE Press, ISSN: 1549-8328, September 2009.
Variability-Aware Design of Multi-Level Logic Decoders for Nanoscale Crossbar Memories, M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (T-CAD), Vol. 27, Nr. 11, pp. 2053-2067, IEEE Press, ISSN: 0278-0070, November 2008.
Network-On-Chip Design and Synthesis Outlook, David Atienza, Federico Angiolini, Srinivasan Murali, Antonio Pullini, Luca Benini, Giovanni De Micheli, Integration-The VLSI Journal, Vol. 41, Nr. 3, pp. 340-359, Elsevier, ISSN: 0167-9260, January 2008
Bringing NoCs to 65nm, Antonio Pullini, Federico Angiolini, Srinivasan Murali, David Atienza, Giovanni De Micheli, Luca Benini, IEEE Micro Magazine, Vol. 12, Nr. 5, pp. 75 – 85, IEEE Press, ISSN: 0272-1732, September 2007.
HW-SW Emulation Framework for Temperature-Aware Design in MPSoCs , David Atienza, Pablo G. Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini,
Giovanni De Micheli, Jose M. Mendias, Roman Hermida, ACM Transactions on
Design Automation for Embedded Systems (TODAES), Vol. 12, Nr. 3, pp. 1 – 26, ACM Press, ISSN: 1084-4309, August 2007.
Synthesis of Predictable Networks-on-Chip Based Interconnect Architectures for Chip Multi-Processors, Srinivasan Murali, David Atienza, Paolo Meloni, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo, IEEE Transactions on Very Large Scale Integration (T-VLSI) Systems, Vol. 15, Nr. 8, pp: 869-880, IEEE Press, ISSN: 1063-8210, August 2007.
Systematic Dynamic Memory Management Design Methodology for Reduced Memory Footprint, David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose M. Mendias, Dimitrios Soudris, ACM Transactions on Design Automation for Embedded Systems (TODAES), Vol. 11 , Nr. 2 , pp. 465 – 489, ACM Press, ISSN: 1084-4309, April 2006.
Memory-Access-Aware Data Structure Transformations for Embedded Software with Dynamic Data Accesses, E. G.Daylight, David Atienza, Arnout Vandecappelle, Francky Catthoor, Jose M. Mendias, IEEE Transactions on Very Large Scale Integration Systems (T-VLSI), Vol. 12, Nr. 3, pp: 269-280, IEEE Press, ISSN: 1063-8210, March 2004.
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COMPLETE LIST OF PUBLICATIONS
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The complete list of publications can be accessed at the ESL Publications Webpage (http://esl.epfl.ch/page-33746.html).
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Tenure Track Assistant Professor