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Tenure-Track Assistant Professor STI IEL ESL

David Atienza Alonso web site: http://esl.epfl.ch/ office(s): ELG131 phone(s): [+41 21 69] 31131,31132 fax: [+41 21 69] 31130 BIOGRAPHY David Atienza Alonso is Professor and Director of the Embedded Systems Laboratory (ESL) at the Institute of Electrical Engineering within the School of Engineering (STI) of EPFL, Switzerland. He also holds the position of Adjunct Professor at the Computer Architecture and Automation Department of Complutense University of Madrid (UCM), Spain. Additionally, he is currently Scientific Counselor of long-time research of Inter-University Micro-Electronics Center Nederland (IMEC-NL), Holst Centre, Eindhoven, The Netherlands. He received his M.Sc. and Ph.D. degrees in Computer Science from Complutense University, Madrid, Spain, and Inter-University Micro-Electronics Center (IMEC), Leuven, Belgium, in 2001 and 2005, respectively. His research interests focus on design methodologies for integrated systems and high-performance embedded systems, including new modelling frameworks to explore thermal management techniques for Multi-Processor System-on-Chip, novel architectures for logic and memories in forthcoming nano-scale electronics, dynamic memory management and memory hierarchy optimizations for embedded systems, Networks-on-Chip interconnection design, and low-power design of embedded systems. In these fields, he is co-author of more than 100 publications in prestigious journals and international conferences, such as, IEEE TCAD, IEEE Micro, IEEE T-VLSI Systems, ACM TODAES, Elsevier-Integration: The VLSI Journal, DAC, ICCAD, DATE, ASP-DAC, etc. He received as co-author the "2009 Best Technical Paper Award" at the 17th IEEE/IFIP Very Large Scale Integration Conference (VLSI-SoC)" and nominations for the "2004 IEEE/ACM Design Automation Conference (DAC) Best Paper Award" and "2006 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) Best Paper Award". Also, he is an Associate Editor of IEEE Transactions on CAD (in the area of System-Level Design), IEEE Letters on Embedded Systems and Elsevier Integration: The VLSI Journal, and member of the Technical Program Committee of the DATE, ICCAD, ISVLSI, GLSVLSI, VLSI-SoC, RTAS, SBCCI and PATMOS conferences. He is an elected member of the Executive Committee of the IEEE Council of Electronic Design Automation (CEDA) since 2008. MISSION The Embedded Systems Laboratory (ESL) focuses its research work on the definition of reliability-aware design, optimization methodologies and system-level exploration tools for high-performance embedded systems and nano-scale Multi-Processor System-on-Chip (MPSoC) architectures. The main research lines within the ESL activities include, but are not restricted to, the following topics: • Thermal and reliability exploration frameworks and management approaches for MPSoCs and embedded systems, both at microarchitectural and system level. • Exploration of synergies between hardware and software components to exploit design trade-offs (area, performance, power) in SoC architectures. • New techniques for memory hierarchy optimization and the design of dynamic memory management mechanisms in multimedia SoC platforms. • System-level design and energy management approaches for wireless sensor networks. • Fault-tolerant circuits and design methodologies for nano-scale electronics made from carbon nanotubes and/or silicon nanowires. MAIN PUBLICATIONS Memory-Access-Aware Data Structure Transformations for Embedded Software with Dynamic Data Accesses, E. G.Daylight, David Atienza, Arnout Vandecappelle, Francky Catthoor, Jose M. Mendias, IEEE Transactions on Very Large Scale Integration Systems (T-VLSI), Vol. 12, Nr. 3, pp: 269-280, IEEE Press, ISSN: 1063-8210, March 2004. Systematic Dynamic Memory Management Design Methodology for Reduced Memory Footprint, David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose M. Mendias, Dimitrios Soudris, ACM Transactions on Design Automation for Embedded Systems (TODAES), Vol. 11 , Nr. 2 , pp. 465 – 489, ACM Press, ISSN: 1084-4309, April 2006. HW-SW Emulation Framework for Temperature-Aware Design in MPSoCs , David Atienza, Pablo G. Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose M. Mendias, Roman Hermida, ACM Transactions on Design Automation for Embedded Systems (TODAES), Vol. 12, Nr. 3, pp. 1 – 26, ACM Press, ISSN: 1084-4309, August 2007. Synthesis of Predictable Networks-on-Chip Based Interconnect Architectures for Chip Multi-Processors, Srinivasan Murali, David Atienza, Paolo Meloni, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo, IEEE Transactions on Very Large Scale Integration (T-VLSI) Systems, Vol. 15, Nr. 8, pp: 869-880, IEEE Press, ISSN: 1063-8210, August 2007. Bringing NoCs to 65nm, Antonio Pullini, Federico Angiolini, Srinivasan Murali, David Atienza, Giovanni De Micheli, Luca Benini, IEEE Micro Magazine, Vol. 12, Nr. 5, pp. 75 – 85, IEEE Press, ISSN: 0272-1732, September 2007. Variability-Aware Design of Multi-Level Logic Decoders for Nanoscale Crossbar Memories, M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, and Giovanni De Micheli, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (T-CAD), Vol. 27, Nr. 11, pp. 2053-2067, IEEE Press, ISSN: 0278-0070, November 2008.

Skills Embedded systems design, system-on-chip (SoC) engineering, memory system optimization, multi-processor design, thermal modeling, software mapping Teaching Electrical and Electronics Engineering Circuits and systems I (EL) [fr] (SEL) Circuits and systems II (EL) [fr] (SEL) Co-design of Systems-on-Chip on Reconfigurable Hardware [en] (SEL) Phd programs Electrical Engineering Microsystems and Microelectronics Phd Students Dogan Ahmed Yasir Khosro Pour Naser Sabry Aly Mohamed Mostafa ADMINISTRATIVE ASSISTANT Homeira Salimi