français | english		EPFL > people@EPFL > Milos Stanisavljevic login

Scientific Consultant STI IEL LSM

Milos Stanisavljevic Microelectronic Systems Laboratory Postdoctoral Research Associate birth date: 28.08.1979 nationality: Serbian/Permit B office(s): ELD334 phone(s): [+41 21 69] 36931 fax: 36959 MISSION My main interests include mixed-signal and digital IC design, reliability evaluation and optimization, embedded systems design, SoCs. My current work is related to the reliability, variability and fault-tolerant design of nanometer-scale systems including tool design, statistical reliability analysis, circuit and digital systems design and 3D integration. BIOGRAPHY Milos Stanisavljevic received the Engineer Diploma (M.S. equivalent degree) in electrical engineering from the Faculty of Electrical Engineering, University of Belgrade in 2004. He received the Ph.D. degree in electrical engineering from Swiss Federal Institute of Technology (EPFL) in March 2009. During his studies he won numerous awards on national competitions. From 1996 to 2004 he received a scholarship for gifted students awarded by Serbian Ministry of Education. In 2001 he won a fellowship for students with extraordinary academic results awarded by Norwegian government. From 1998 to 2003 he worked as an assistant, program coordinator and organizer on electronics seminars in Petnica Science Center, Serbia. During 2003 he worked on numerous projects incorporating embedded systems design. In 2004 he worked as an analog design and layout engineer for Elsys Design, Belgrade at communication chip project for Texas Instruments, Nice and and as an embedded systems developer. He joined Microelectronic Systems Laboratory at EPFL as the research assistant and PhD student at the end of 2004. In 2006 he worked for six months in IBM Research in Zurich on the project related to the reliability emulation of the cryptographic engine in the state-of-the-art nanoscale CMOS technology. Member of IEEE, Euresearch, HiPEAC, IBM Academic Initiative, Xilinx University Program, VentureLab (participated in Venture 2008 with two proposals), participated in creation of Mingle Makers start-up. MAIN PUBLICATIONS M. Stanisavljevic. On the dependability of nanoscale circuits and systems. PhD thesis, Lausanne, 2009. [ Details | Full Text | Link ] M. Stanisavljevic, A. Schmid, and Y. Leblebici. On the Reliability of Post-CMOS and SET Systems. International Journal of Nanotechnology and Molecular Computation (IJNMC), 1, 2009. [ Details | Full Text | Link ] M. Stanisavljevic, A. Schmid, and Y. Leblebici. Optimization of the Averaging Reliability Technique using Low Redundancy Factors for Nanoscale Technologies. IEEE Transactions on Nanotechnology, 8(2), 2009. [ Details | Full Text | Link ] M. Stanisavljevic, A. Schmid, and Y. Leblebici. Optimization of nanoelectronic systems' reliability under massive defect density using Cascaded R-fold modular redundancy. Nanotechnology, 19, 2008. [ Details | Full Text ] S. Lukovic, M. Stanisavljevic, and N. Puzovic. An Enhanced Service Provider Communication Interface with Client Priorization. In Proceedings of International Joint Conference on e-Business and Telecommunications (ICETE/ICE-B). IEEE/WFM, 2008. [ Details | Full Text | Link ] M. Stanisavljevic, A. Schmid, and Y. Leblebici. A Methodology for Reliability Enhancement of Nanometer- Scale Digital Systems Based on A-Priori Functional Fault- Tolerance Analysis. In VLSI-SoC: From Systems to Silicon, volume 240 of IFIP International Federation for Information Processing, pages 111-125. Springer, Boston, 2007. [ Details | Full Text | Link ] M. Stanisavljevic, F. K. Gürkaynak, A. Schmid, Y. Leblebici, and M. Gabrani. A 90nm CMOS Cryptographic Core with Improved Fault- Tolerance in Presence of Massive Defect Density. In International Conference on Nano-Networks, Nano-Nets 2007, 2007. [ Details | Link ] M. Stanisavljevic, F. K. Gürkaynak, A. Schmid, Y. Leblebici, and M. Gabrani. Case Study of Fault-Tolerant Architectures for 90nm CMOS Cryptographic Cores. In 3rd Conf. on Ph.D. Research in Microelectronics and Electronics, Bordeaux, 2007. [ Details | Full Text | Link ] M. Stanisavljevic, F. K. Gürkaynak, A. Schmid, Y. Leblebici, and M. Gabrani. Design and Realization of a Fault-Tolerant 90nm Cryptographic Engine Capable of Performing under Massive Defect Density. In 17th Edition of the Great Lakes Symposium on VLSI (GLSVLSI), pages 204 - 207. ACM, 2007. [ Details | Full Text | Link ] M. Stanisavljevic, F. K. Gürkaynak, A. Schmid, and Y. Leblebici. Design for Reliability of Nanometer-Scale Electronics under High Defect Density. In nanoelectronics days 2006, Abstract Book, page appendix, 2006. [ Details | Full Text | Link ] M. Stanisavljevic, A. Schmid, and Y. Leblebici. Fault-Tolerance of Robust Feed-Forward Architecture Using Single-Ended and Differential Deep-Submicron Circuits Under Massive Defect Density. In International Joint Conference on Neural Networks, pages 2771- 2778. IEEE, 2006. [ Details | Full Text | Link ] M. Stanisavljevic, A. Schmid, and Y. Leblebici. Analysis of Reliability in Nano-Scale Circuits and Systems Based on A-Priori Statistical Fault-Modeling Methodology. In 48th Midwest Symposium on Circuits and Systems, pages 1565-1568. IEEE, 2005. [ Details | Full Text | Link ] M. Stanisavljevic, V. Abhishek, A. Schmid, and Y. Leblebici. A Methodology for Reliability Enhancement of Nanometer-Scale Digital Systems Based on A-Priori Functional Fault-Tolerance Analysis. In IFIP WG 10.5 Conference on Very Large Scale Integration System-on-Chip, 2005, pages 199-204. IFIP, 2005. [ Details | Full Text | Link ]