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Student Doctoral Program in Microsystems and Microelectronics Doctoral Assistant Integrated Systems Laboratory (IC/STI)

Shashi Kanth Bobba Doctoral Program in Microsystems and Microelectronics PhD Student web site: office(s): INF336 phone(s): [+41 21 69] 30920 BIOGRAPHY Shashikanth Bobba was born in Vizag, India, . He holds Post-Graduate Masters in "Wireless systems and related technologies" (summa cum laude) from Politecnico di Torino (Italy), Masters in "System-On-Chip design" from Lund University (Sweden) and Bachelors in "Electrical and Electronics Engineering" (with Distinction) from JNT University (India). His industrial/research experience includes: Visiting researcher at Stanford University, Visiting researcher at CEA-LETI (Grenoble, France), EDA software engineer at Agilent technologies (Ghent, Belgium), Project intern at Telecom Italia labs (Torino, Italy), Verification and CAD Engineer at Ericsson Microwave AB (Gothenburg, Sweden) and Diploma worker at Ericsson Research (Lund, Sweden). Currently, he is a Research Assistant and a Doctoral Candidate in the Integrated Systems Laboratory (LSI). His research interests are in various aspects of Computer-Aided-Design (CAD) and design methodologies for Emerging nanotechnologies. MAIN PUBLICATIONS P. Batude, M. Vinet, B. Previtali, C. Tabone, C. Xu, J. Mazurier, O. Weber, F. Andrieu, L. Tosti, L. Brevard, B. Sklenard, B. Coudrain, S. K. Bobba, H. Ben Jamaa, P.-E. Gaillardon, A. Pouydebasque, O. Thomas, C. Le Royer, J.-M. Hartmann, L. Sanchez, L. Baud, V. Carron, L. Clavelier, G. De Micheli, S. Deleonibus, O. Faynot, and T. Poiroux. Advances, Challenges and Opportunities in 3D CMOS Sequential Integration. In Proceedings of the IEEE International Electron Devices Meeting (IEDM), 2011. [ Details | Full Text ] D. Sacchetto, H. Ben Jamaa, B. Shashi Kanth, and F. Sun. Emerging Interconnect Technologies. In Communication Architectures for Systems-On-Chip. CRC Press Taylor & Francis Group, 6000 Broken Sound Parkway NW, Suite 300, 2011. [ Details ] S. K. Bobba, A. Chakraborty, O. Thomas, P. Batude, T. Ernst, O. Faynot, D. Z. Pan, and G. De Micheli. CELONCEL: Effective Design Technique for 3-D Monolithic Integration targeting High Performance Integrated Circuits. In Proceedings of the 16th Asia and South Pacific Design Automation Conference, pages 337-343, 2011. [ Details | Full Text ] M. De Marchi, S. Bobba, H. Ben Jamaa, and G. De Micheli. Synthesis of regular computational fabrics with ambipolar CNTFET technology. In Proceedings of the 17th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2010), 2010. [ Details | Full Text ] S. K. Bobba, A. Chakraborthy, O. Thomas, P. Batude, V. Pavlidis, and G. De Micheli. Performance Analysis of 3-D Monolithic Integrated Circuits. In Proceedings of the IEEE International 3D System Integration Conference (3DIC'10), 2010. [ Details | Full Text ] J. Zhang, S. Bobba, N. Patil, A. Lin, H.-S. P. Wong, G. De Micheli, and S. Mitra. Carbon Nanotube Correlation: Promising Opportunity for CNFET Circuit Yield Enhancement. In Proceedings of the 47th Design Automation Conference (DAC 2010), volume 1, pages 889-892, 2010. [ Details | Full Text ] S. Bobba, S. Carrara, and G. De Micheli. Design of a CNFET Array for Sensing and Control in P450 based Biochips for multiple drug detection. In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), volume 1 of IEEE International Symposium on Circuits and Systems, pages 1065-1068. Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa, 2010. [ Details | Full Text ] S. Bobba, J. Zhang, A. Pullini, D. Atienza, H.-S. P. Wong, and G. De Micheli. Design of Compact Imperfection-Immune CNFET Layouts for Standard-Cell-Based Logic Synthesis. In Proceedings of the Design, Automation and Test in Europe Conference (DATE), pages 616-621, 2009. [ Details | Full Text ] D. Atienza, S. K. Bobba, M. Poli, G. De Micheli, and L. Benini. System-Level Design for Nano-Electronics. In Proceedings of the 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS), volume 1, pages 747-751, New York, 2007. IEEE Circuits and Systems Society. [ Details | Full Text ] FORTH-COMING PUBLICATIONS P. Batude, M. Vinet, B. Previtali, C. Tabone, C. Xu, B. Sklenard, P. Coudrain, S. Bobba, H. Ben Jamaa, P.-E. Gaillardon, A. Pouydebasque, O. Thomas, C. Le Royer, J.-M. Hartmann, L. Sanchez, L. Baud, V. Carron, L. Clavelier, G. De Micheli, S. Deleonibus, O. Faynot, T. Poiroux, "Advances, Challenges and Opportunities in 3D CMOS Sequential Integration", IEEE International Electron Devices Meeting (IEDM), 05-07 December 2011, Washington (DC), USA. PATENTS MULTI-LEVEL INTEGRATED CIRCUIT, DEVICE AND METHOD FOR MODELING MULTI-LEVEL INTEGRATED CIRCUITS

ADDRESS Shashikanth Bobba Chemin des Cotes 4; Renens 1020