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Postdoctoral Researcher IC ISIM LSI1

Vasileios Pavlidis Integrated Systems Laboratory (IC/STI) Post-doctoral researcher birth date: 13.02.1976 nationality: Greek web site: http://si2.epfl.ch/~vpavlidi office(s): INF337 phone(s): [+41 21 69] 30919 fax: +41216934225 MISSION My main objective within the Laboratory of Integrated Systems is to reinforce the research efforts related to the development of design methodologies and CAD tools for 3-D integrated systems. Currently, I supervise PhD and Master students and participate as the PI and co-PI in two research projects funded by industry and the Swiss National Science Foundation, respectively. My broader research interests are in the area of interconnect modeling, 3-D integration, networks-on-chip, and related design issues in VLSI. BIOGRAPHY I was born in 1976 at Kavala, a picturesque city northeast of Greece. I grew up in Athens where I spent most of my teen years. I moved to Xanthi due to my university studies in 1995 where I lived through July of 2002. During this time period, I received the Bachelor’s and Master’s degree from the Electrical and Computer Engineering department of the Democritus Univ. of Thrace, Xanthi, Greece. In September of 2002, I joined the ECE department of the Univ. of Rochester in Rochester, NY, USA. Under the supervision of Professor Eby G. Friedman, I graduated in 2008 with the PhD degree from the Univ. of Rochester. I also received a Master’s degree from the same university in 2003. Since September of 2008, I work for Professor Giovanni De Micheli as a post-doctoral at the Laboratory of Integrated Systems (LSI). MAIN PUBLICATIONS Three-Dimensional Integrated Circuit Design, V. F. Pavlidis and E. G. Friedman, Morgan Kaufmann Publishers, ISBN: 978-0-12-374343-5, 2009 Interconnect-Based Design Methodologies for Three-Dimensional Integrated Circuits, V. F. Pavlidis and E. G. Friedman, Proceedings of the IEEE, Special Issue on 3-D Integration Technologies, Vol. 97, No. 1, pp. 123-140, January 2009 Timing Driven Via Placement Heuristics in 3-D ICs, V. F. Pavlidis and E. G. Friedman, Integration, the VLSI Journal, Vol. 41, No. 4, pp. 489-508, July 2008 3-D Topologies for Networks-on-Chip, V. F. Pavlidis and E. G. Friedman, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 15, No. 10, pp. 1081-1090, October 2007 Clock Distribution Networks for 3-D Integrated Circuits, V. F. Pavlidis, I. Savidis, and E. G. Friedman, , Proceedings of the IEEE International Conference on Custom Integrated Circuits, pp. 651-654, September 2008 Other interests Lausanne is highly suitable for several extracurricular activities. Thus, I enjoy sailing at Lac de Leman. I am also a member of a dancing club learning Greek dances; maintaining a lively connection with homeland. I greatly enjoy reading literature, primarily history and politics. Some of my favorite writers include, I. Calvino, U. Eco, H. Miller, I. Allende, H. Murakami, N. Kazantzakis, S. Tsirkas and several others, I guess, whose work I have yet to acquaint myself.