Alain Vachoux
EPFL STI IEL LSM
ELD 338 (Bâtiment ELD)
Station 11
CH-1015 Lausanne
Biography
2013-2017: Technical Editor of the IEEE Std 1076.1 Language Reference Manual.
2007-2013: Secretary of the IEEE 1076.1 Working Group.
2006-2012: Key contributor to the OSCI AMS Working Group.
Since 2006: Europractice representative for EPFL.
2005-2007: Chair of the IEEE 1076.1 Working Group.
Since May 2002: Research Associate, EPFL, Microelectronic Systems Laboratory (LSM), Prof. Yusuf Leblebici, Lausanne, Switzerland.
- Support for language-based design methodology of heterogeneous hardware systems.
Management and support of EDA tools and design kits.
Lecturer on hardware systems modelling with VHDL and VHDL-AMS.
2001-2002: IP Library and Methodology Manager, Antrim Design Systems, Le Vaud, Switzerland.
- Development of design workspaces for pipelined AD converters.
Support of VHDL-AMS in Antrim tools.
Management of the development of a layout migration tool for mixed-signal circuits.
EPFL lecturer on integrated circuit modelling with VHDL and VHDL-AMS.
1998-2001: Group Manager, IP and Methodology, XEMICS S.A., Neuchâtel, Switzerland.
- Deployment and support of proprietary low-power standard cell library, RAM/ROM memories and 8-bit CoolRISC core (incl. software development environment).
EPFL lecturer on integrated circuit modelling with VHDL and VHDL-AMS.
1990-1998: First Assistant, then Adjoint Scientifique, EPFL, Center for Integrated Systems (C3i), Prof. Daniel Mlynek, Lausanne, Switzerland.
- Project leader for industrial projects (YvyTeam, Mentor Graphics, Motorola).
Lecturer on tools and methods for integrated circuit design, and modelling, simulation, and synthesis with VHDL.
Contribution to the design of the IEEE Std 1076.1 (VHDL-AMS), secretary and chair (1997-1999) of the IEEE 1076.1 Working Group.
1980-1990: Assistant, Ph.D. student, EPFL, Circuits and Systems Chair, Prof. Jacques Neirynck, Lausanne, Switzerland.
- Ph.D. thesis on the implementation of the Waveform Relaxation Method for the analysis of large-scale digital MOS circuits.
Porting of filter design softwares from Algol to Pascal.
Design and development of a harmonic simulator for filters with general structures.
Compétences
Modelling of analog, mixed-signal, and multi-discipline systems.
Language-based hardware design.
Front-end EDA tools (simulation, synthesis, verification).
Computer-aided design of VLSI circuits.
Publications
MAIN PUBLICATIONS
| F. Pecheux, C. Lallement, A. Vachoux Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Volume 24, Issue 2, Feb. 2005 Page(s):204 - 225 |
VHDL-AMS and Verilog-AMS as alternative hardware description languages for efficient modeling of multidiscipline systems |
| A. Vachoux, C. Grimm, K. Einwich Proc. Second IEEE International Workshop on Electronic Design, Test and Applications, Perth, Australia, January 2004, pp. 97-102 |
Towards analog and mixed-signal SOC design with SystemC-AMS |
| A. Vachoux, C. Grimm, K. Einwich Design, Automation and Test in Europe Conference and Exhibition, 2003, Page(s):388 - 393 |
SystemC-AMS requirements, design objectives and rationale |
| A. Vachoux Design Automation Conference 1997. Proceedings of the ASP-DAC '97. Asia and South Pacific 28-31 Jan. 1997 Page(s):649 - 654 |
VHDL analog and mixed-signal extensions through examples |
Infoscience
Les donées en-ligne ne sont pas accessiblesEnseignement & Phd
Enseignement
- Electrical and Electronics Engineering,
Programmes doctoraux
- Doctoral Program in Microsystems and Microelectronics
- Doctoral Program in Electrical Engineering
Doctorants
A dirigé les thèses de
Mähne Torsten ...Rodriguez Estupinan Juan Sebastian ...
Cours
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Le cours permet d'acquérir des connaissances de base sur les méthodologies et les outils pour la conception, l'optimisation et la vérification de composants et systèmes matériels digitaux. Le langage VHDL est utilisé pour décrire une architecture matériel... 
Hardware systems modeling I
Usage de modèles dans la conception de systèmes microélectroniques digitaux de la conception RTL avec le langage VHDL au niveau système plus abstrait requis par les systèmes sur puces modernes. Introduction des langages SystemVerilog et SystemC et des pri...
Hardware systems modeling II
Création et utilisation de modèles de systèmes analogiques et mixtes analogiques-logiques à différents niveaux d'abstraction. Utilisation du langage de modélisation VHDL-AMS.
Hardware systems modeling
Ce cours traite des aspects principaux liés à la modélisation des composants et systèmes matériels digitaux et mixtes digitaux-analogiques à l'aide des langages de modélisation VHDL et VHDL-AMS.
Lab in EDA based design
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