Vincent Camus received the B.Sc. in physics and electronics and the Diplôme d'Ingénieur from Grenoble Institute of Technology (Grenoble INP) PHELMA, France, in 2010 and 2013, respectively. He also received the M.Sc. in micro and nanotechnologies for integrated systems jointly delivered by the Swiss Federal Institute of Technology in Lausanne (EPFL), Switzerland, the Polytechnic University of Turin (Polito), Italy, and Grenoble INP, France.
He joined the Integrated Circuits Laboratory (ICLAB) at the EPFL, Switzerland, in 2013 and is currently pursuing a Ph.D. in approximate and error-resilient circuits for energy-efficient DSP and hardware acceleration. His interests include digital circuit design and design automation for low-power and high-performance electronics, as well as machine learning and embedded systems.
Vincent Camus has been IEEE student member and ACM member since 2015 and 2016, respectively. He has also participated in organizing several conferences (AACD'15, ESSCIRC'16), special sessions and other scientific events under the supervision of Prof. Christian Enz.
V. Camus, M. Cacciotti, J. Schlachter and C. Enz, Design of Approximate Circuits by Fabrication of False Timing Paths: The Carry Cut-Back Adder. IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2018. (open access & open source)
J. Bonnot, V. Camus, K. Desno and D. Menard, CASSIS: Characterization with Adaptive Sample-Size Inferential Statistics Applied to Inexact Circuits. 26th IEEE European Signal Processing Conference (EUSIPCO), Roma, Italy, 2018.
M. Franceschi, V. Camus, A. Ibrahim, C. Enz and M. Valle, Approximate FPGA Implementation of CORDIC for Tactile Data Processing using Speculative Adders. 2017 IEEE New Generation of Circuits and Systems Conference (NGCAS), Genova, Italy, 2017.
X. Jiao, V. Camus, M. Cacciotti, Y. Jiang, C. Enz and R. K. Gupta, Combining Structural and Timing Errors in Overclocked Inexact Speculative Adders. 2017 IEEE Conference in Design, Automation & Test in Europe (DATE), Lausanne, Switzerland, 2017.
J. Schlachter, V. Camus, K. V. Palem and C. Enz, Design and Applications of Approximate Circuits by Gate-Level Pruning. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017.
V. Camus, J. Schlachter, M. Gautschi, F. K. Gurkaynak and C. Enz, Approximate 32-bit Floating-point Unit Design with 53% Power-Area Product Reduction. 2016 IEEE 42nd European Solid-State Circuits Conference (ESSCIRC), Lausanne, Switzerland, 2016.
V. Camus, J. Schlachter and C. Enz, A Low-power Carry Cut-Back Approximate Adder with Fixed-point Implementation and Floating-point Precision. 2016 ACM/EDAC/IEEE Design Automation Conference (DAC), Austin, TX, USA, 2016. (open access)
J. Schlachter, V. Camus and C. Enz, Design of Energy-efficient Discrete Cosine Transform using Pruned Arithmetic Circuits. 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, Canada, 2016.
J. Schlachter, V. Camus and C. Enz, Near/sub-threshold Circuits and Approximate Computing: the Perfect Combination for Ultra-low-power Systems. 2015 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Montpellier, France, 2015.
V. Camus, J. Schlachter and C. Enz, Energy-efficient Digital Design through Inexact and Approximate Arithmetic Circuits. 2015 IEEE International New Circuits and Systems Conference (NEWCAS), Grenoble, France, 2015.
J. Schlachter, V. Camus, K. V. Palem and C. Enz. Automatic Generation of Inexact Digital Circuits by Gate-level Pruning. 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, 2015.
V. Camus, J. Schlachter and C. Enz. Energy-efficient Inexact Speculative Adder with High Performance and Accuracy Control. 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, 2015. (nominated for best student paper award)
V. Camus, G. Karakonstantis, J. Schlachter, A. P. Burg and C. Enz. Cross-layer Inexact Design for Low-power Applications. NanoTera Annual Meeting, Lausanne, Switzerland, 2014.
V. Camus. Quantum Technology: Single-Photon Source. Internship thesis report, arXiv research extract only, arXiv quant-ph, 2017.
V. Camus. Quantum Technology: Single-Photon Source. Internship thesis report, National Institute of Informatics (NII), Tokyo, Japan, 2012 (online 2017).
V. Camus. SPDC-based Single-photon Source with Frequency Up-conversion Multiplexed Architecture. Research report: optical device suggestion, National Institute of Informatics (NII), Tokyo, Japan, 2012 (online 2017).