 
        
    David Mallasen Quintana
EPFL STI IEM ESL
ELG 136 (Bâtiment ELG)
Station 11
1015 Lausanne
              
                +41 21 693 58 04
                
              
            
              Office: ELG 136
              EPFL › STI › IEM › ESL
            
          
Website: https://esl.epfl.ch
EPFL STI IEM ESL
ELG 136 (Bâtiment ELG)
Station 11
1015 Lausanne
              
                +41 21 693 58 04
                
              
            
              Office: ELG 136
              EPFL › IC › IC-SIN › SIN-ENS
            
          
Website: https://sin.epfl.ch
Teaching & PhD
Courses
Design technologies for integrated systems
Hardware compilation is the process of transforming specialized hardware description languages into circuit descriptions, which are iteratively refined, detailed and optimized. The course presents algorithms, tools and methods for hardware compilation and logic synthesis.
