Fields of expertise
- High-level Synthesis
- Dataflow Architecture
BiographyAyatallah is a PhD student in the Processor Architecture Laboratory, advised by Professor Paolo Ienne. She received a BSc degree in Computer Engineering from the American University in Cairo, Egypt in 2020 and started her PhD in the same year.
Her research interests include electronic design automation, computer architecture and compilers. Her current research focuses on optimizing dataflow circuits generated for dynamically scheduled high-level synthesis.
EPFL EDIC Doctoral Fellowship
|Ayatallah Elakhras, Andrea Guerrieri, Lana Josipović, and Paolo Ienne
In Proceedings of the 32nd International Conference on Field‐Programmable Logic and Applications
|Unleashing Parallelism in Elastic Circuits with Faster Token Delivery|
|Ayatallah Elakhras, Riya Sawhney, Andrea Guerrieri, Lana Josipović, and Paolo Ienne
In Proceedings of the 31st ACM/SIGDA Intl. Symposium on Field Programmable Gate Arrays
|Straight to the Queue: Fast Load-Store Queue Allocation in Dataflow Circuits|