About meI am a research associate involved in undergraduate teaching and outreach activities (for more details visit our IC Declic Summer School Webpage). In addition, I work for Cadence Design Systems.
In my research I focus on the development of reliable computer systems using synthesis techniques.
In particular, I am interested in
- Synthesis and repair of programs,
- Quantitative verification and synthesis,
- Synthesis from specifications in temporal logics,
- Analysis and verification of hardware designs, transactional memories, and business process models,
- Synthesis techniques for embedded systems and Interface theory, and
- Infinite games and Automata theory.
Previously, I was a CNRS research scientist at Verimag, an academic research laboratory belonging to the CNRS (Centre National de la Recherche Scientifique) and the University of Grenoble, France.
This webpage will be updated soon.
In the meantime, please visit my webpage at Verimag:
: [+41 21 69] 36651
- Automatic synthesis and repair of reactive programs
- Quantitative analysis and synthesis
- Formal verification and modelling of systems (e.g., hardware designs, transactional memories, biological systems, business processes,...)