About meI am a research associate active in undergraduate teaching and outreach activities (for more details visit our IC Declic Summer School Webpage). In addition, I work for Cadence Design Systems. In my research I focus on the development of reliable computer systems using synthesis techniques. In particular, I am interested in - Synthesis and repair of programs, - Quantitative verification and synthesis, - Synthesis from specifications in temporal logics, - Analysis and verification of hardware designs, transactional memories, and business process models, - Synthesis techniques for embedded systems and Interface theory, and - Infinite games and Automata theory. Previously, I was a CNRS research scientist at Verimag, an academic research laboratory belonging to the CNRS (Centre National de la Recherche Scientifique) and the University of Grenoble, France. For more information visit my webpage at https://icwww.epfl.ch/~jobstman/.
My research focuses on Synthesis-Augmented System Development techniques.
My research in a word cloud.
- Since June 2014: FAE for Cadence Design Systems, Munich, Germany
- Since March 2013: associate scientist at EPFL
- April 2011 - June 2014: FAE for Jasper Design Automation, CA, USA
- October 2009 - April 2016: associate researcher at CNRS/Verimag, Grenoble, France
- April 2007 - September 2009: Postdoctoral researcher at MTC laboratory, EPFL, Switzerland
- January 2004 - March 2007: PhD student in Compute Science at TU-Graz, Austria
- March 2003 - November 2003: software engineer at Neosera Systems, Dublin, Ireland
- October 1996 - March 2003: Master student in Telematics (Computer Science/Electrical Engineering) at TU-Graz, Austria
Quantitative analysis and synthesis
Formal verification and modelling of systems (e.g., hardware designs, transactional memories, biological systems, business processes,...)