Mission

As Head of the Embedded Systems Laboratory (ESL) at EPFL, Prof. David Atienza's research focuses on the definition of system-level multi-objective design methods, optimization methodologies and tools for high-performance embedded systems and nano-scale Multi-Processor System-on-Chip (MPSoC) architectures targeting the Internet-of-Things (IoT) Era. The main research lines within the ESL activities include, but are not restricted to, the following topics:

- Thermal and reliability exploration frameworks and management approaches for MPSoCs and embedded systems, both at microarchitectural and system level.

- System-level design and optimization approaches for IoT, with particular emphasis on edge computing and wireless body sensor networks.

- Exploration of synergies between hardware and software components to exploit design trade-offs (area, performance, power) in MPSoC architectures.

- New techniques for memory hierarchy optimization, on-chip interconnects and the design of dynamic memory management mechanisms in multimedia SoC platforms.

For more information and videos, please visit our ESL You Tube Channel.

Biography

David Atienza Alonso is associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively.

His research interests focus on system-level design methodologies for high-performance multi-processor Systems-on-Chip (MPSoC) and low-power embedded systems, including new thermal-aware design for 2D and 3D MPSoCs, design methods and architectures for Internet of Things (IoT) and wireless body sensor networks, dynamic memory management and interconnection hierarchy optimizations. In these fields, he is co-author of more than 270 publications in prestigious journals and international conferences, several book chapters and nine U.S. and international patents.

He received the Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006 and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC) and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He serves as President of IEEE CEDA in the period 2018-2019, and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM, and an IEEE Fellow.

ADMINISTRATIVE ASSISTANT

Homeira Salimi

COMPLETE LIST OF PUBLICATIONS

The complete list of publications can be accessed at the ESL Publications Webpage (http://esl.epfl.ch/page-33746.html) or at my Google Scholar Page (http://scholar.google.com/citations?hl=en&user=H1JXhMIAAAAJ).