David Atienza Alonso
As Head of the Embedded Systems Laboratory (ESL) at EPFL, Prof. David Atienza's research focuses on the definition of system-level multi-objective design methods, optimization methodologies and tools for high-performance embedded systems and nano-scale Multi-Processor System-on-Chip (MPSoC) architectures targeting the Internet-of-Things (IoT) Era. The main research lines within the ESL activities include, but are not restricted to, the following topics:
- Thermal and reliability exploration frameworks and management approaches for MPSoCs and embedded systems, both at microarchitectural and system level.
- System-level design and optimization approaches for IoT, with particular emphasis on edge computing and wireless body sensor networks.
- Exploration of synergies between hardware and software components to exploit design trade-offs (area, performance, power) in MPSoC architectures.
- New techniques for memory hierarchy optimization, on-chip interconnects and the design of dynamic memory management mechanisms in multimedia SoC platforms.
For more information and videos, please visit our ESL You Tube Channel.
David Atienza Alonso is associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively.
His research interests focus on system-level design methodologies for high-performance multi-processor Systems-on-Chip (MPSoC) and low-power embedded systems, including new thermal-aware design for 2D and 3D MPSoCs, design methods and architectures for Internet of Things (IoT) and wireless body sensor networks, dynamic memory management and interconnection hierarchy optimizations. In these fields, he is co-author of more than 270 publications in prestigious journals and international conferences, several book chapters and nine U.S. and international patents.
He received the Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006 and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC) and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He serves as President of IEEE CEDA in the period 2018-2019, and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM, and an IEEE Fellow.
COMPLETE LIST OF PUBLICATIONS
The complete list of publications can be accessed at the ESL Publications Webpage (http://esl.epfl.ch/page-33746.html) or at my Google Scholar Page (http://scholar.google.com/citations?hl=en&user=H1JXhMIAAAAJ).
Fields of expertise
Internet of Things (IoT) and edge computing design, embedded systems design, 2D/3D thermal modeling and management for multi-processor system-on-chip (MPSoc), electronic design automation (EDA), wireless body sensor networks (WBSN), memory optimizations, low-power hardware and software co-design, embedded machine learning.
|Ali Pahlevan, Xiaoyu Qu, Marina Zapater, David Atienza
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 37, No. 8, pp. 1667-1680, IEEE Press, August 2018.
|Integrating Heuristic and Machine-Learning Methods for Efficient Virtual Machine Allocation in Data Centers|
|Artem Andreev, Arvind Sridhar, Mohamed M. Sabry, Marina Zapater, Patrick Ruch, Bruno Michel, David Atienza.
IEEE Transactions on Computers, Vol. 67, Issue: 1, pp. 73-85, IEEE Computer Society, January 2018.
|PowerCool: Integrated Flow Cell Arrays for Cooling and Powering 3D MPSoCs|
|Loris Duch, Soumya Basu, RubÃ©n Braojos, Giovanni Ansaloni, Laura Pozzi, David Atienza
IEEE Transactions on Circuits and Systems: Part I (TCAS-I), Vol. 64, Issue: 9, pp. 2448-2461, IEEE Press, September 2017.
|HEAL-WEAR: an Ultra-Low Power Heterogeneous System for Bio-Signal Analysis|
|Karim Kanoun, Cem Tekin, David Atienza, Mihaela van der Schaar
IEEE Transactions on Computers, Vol. 65, Issue: 12, pp. 3591-3605, IEEE Computer Society, December 2016.
|Big-Data Streaming Applications Scheduling Based on Staged Multi-Armed Bandits|
|Arvind Sridhar, Alessandro Vincenzi, David Atienza, Thomas Brunschwiler
IEEE Transactions on Computers, Vol. 63, Issue: 10, pp. 2576-2589, IEEE Computer Society, October 2014.
|3D-ICE: a Compact Thermal Model for Early-Stage Design of Liquid-Cooled ICs|
|Hossein Mamaghanian, Nadia Khaled, David Atienza, Pierre Vandergheynst
IEEE Transactions on Biomedical Engineering, Vol. 58, No. 12, pp. 120-129, IEEE Press, September 2011.
|Compressed Sensing for Real-Time Energy-Efficient ECG Compression on Wireless Body Sensor Nodes|
|Francisco Rincon, Joaquin Recas, Nadia Khaled, David Atienza
IEEE Transactions on Information Technology in BioMedicine, Vol. 16, Nr. 11, pp. 1-9, IEEE Press, November 2011.
|Development and Evaluation of Multi-Lead Wavelet-Based ECG Delineation Algorithms for Embedded Wireless Sensor Nodes|
COMPLETE LIST OF PUBLICATIONS
Teaching & PhD
- Electrical and Electronics Engineering,
- Doctoral Program in Electrical Engineering
- Doctoral Program in Microsystems and Microelectronics
- Doctoral program in computer and communication sciences
Basu Soumya Subhra
De Giovanni Elisabetta
Dell'Agnola Fabio Isidoro Tiberio
Denkinger Benoît Walter
Qureshi Yasir Mahmood
Simon William Andrew
Surrel Grégoire Casimir Joseph
Past PhD StudentsAly Mohamed Mostafa Sabry ...
Beretta Ivan ...
Braojos Lopez Ruben ...
Constantin Jeremy Hugues-Felix ...
Dogan Ahmed Yasir ...
Duch Loris Gérard ...
Kanoun Karim ...
Mahankali Sridhar Arvind Raj ...
Mamaghanian Hossein ...
Raghav Shivani ...
This course provides an overview of the relevant technologies and approaches for the design and optimization of Internet-of-Things (IoT) systems. It covers architectures of edge computing platforms, wireless communication options, cloud computing backend ...Doctoral Program in Electrical Engineering, 2018-2019, language : english
Students will learn how to construct a complex digital embedded system on an FPGA with many peripheral components. The system includes microprocessors, IP blocks, custom hardware components, as well as software. After a guided example, students will devel...MINEUR, 2018-2019, Spring semester, language :
Section of Electrical and Electronical Engineering, 2018-2019, Bachelor semester 6, language :
Section of Electrical and Electronical Engineering, 2018-2019, Spring semester, language :
Section of Electrical and Electronical Engineering, 2018-2019, Master semester 1, language : english
Section of Electrical and Electronical Engineering, 2018-2019, Master semester 3, language : english
Section of Microtechnics, 2018-2019, Master semester 1, language : english
Section of Microtechnics, 2018-2019, Master semester 3, language : english
The student will get to know the architecture of microprogrammed embedded systems, including the microprocessor architecture, memory hierarchy and different input/output peripherals, using as case study the Nintendo DS portable platform.MINEUR, 2018-2019, Autumn semester, language :
Section of Electrical and Electronical Engineering, 2018-2019, Autumn semester, language :
Section of Electrical and Electronical Engineering, 2018-2019, Bachelor semester 5, language :