Pasquale Davide Schiavone

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davide.schiavone@epfl.ch +41 21 693 75 50

EPFL STI IEM ESL
ELG 136 (Bâtiment ELG)
Station 11
1015 Lausanne

+41 21 693 75 50
Office:  ELG 136
EPFL > STI > IEM > ESL

Web site:  Web site:  https://esl.epfl.ch

+41 21 693 75 50
EPFL > STI > PAT > PAT-GE

+41 21 693 75 50
EPFL > IC > IC-SIN > SIN-ENS

Web site:  Web site:  https://sin.epfl.ch

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Administrative data

Teaching & PhD

Teaching

Computer Science

Courses

Design technologies for integrated systems

Hardware compilation is the process of transforming specialized hardware description languages into circuit descriptions, which are iteratively refined, detailed and optimized. The course presents algorithms, tools and methods for hardware compilation and logic synthesis.