Pasquale Davide Schiavone
EPFL STI IEM ESL
ELG 136 (Bâtiment ELG)
Station 11
1015 Lausanne
+41 21 693 75 50
Office:
ELG 136
EPFL › STI › IEM › ESL
Website: https://esl.epfl.ch
+41 21 693 75 50
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+41 21 693 75 50
EPFL › IC › IC-SIN › SIN-ENS
Website: https://sin.epfl.ch
Teaching & PhD
Courses
Design technologies for integrated systems
CS-472
Hardware compilation is the process of transforming specialized hardware description languages into circuit descriptions, which are iteratively refined, detailed and optimized. The course presents algorithms, tools and methods for hardware compilation and logic synthesis.