Early Classification of Pathological Heartbeats on Wireless Body Sensor Nodes, in Sensors, vol. 14, num. 11, p. 22533-22551, 2014.
Risk Assessment of Atrial Fibrillation: a Failure Prediction Approach, accepted in Computers in Cardiology, vol. 41, num. 1, p. 170-173, 2014.
Hardware-Software Inexactness in Noise-aware Design of Low-Power Body Sensor Nodes. Designing with Uncertainty - Opportunities & Challenges, York, United Kingdom, 2014..
Power-Efficient Joint Compressed Sensing of Multi-Lead ECG Signals. 39th International Conference on Acoustics, Speech and Signal Processing (ICASSP 2014), Florence, Italy, International Conference on Acoustics Speech and Signal Processing ICASSP, 2014..
Ultra-Low Power Design of Wearable Cardiac Monitoring Systems. IEEE/ACM 2014 Design Automation Conference (DAC), San Francisco, CA, USA, 2014..
Hardware/Software Approach for Code Synchronization in Low-Power Multi-Core Sensor Nodes. IEEE/ACM 2014 Design Automation and Test in Europe (DATE) Conference, Dresden, Germany, 2014..
A Methodology for Embedded Classification of Heartbeats Using Random Projections. DATE2013, Grenoble, France, 2013..
Synchronizing Code Execution on Ultra-Low-Power Embedded Multi-Channel Signal Analysis Platforms. The Design, Automation and Test in Europe (DATE), 2013, Grenoble, France, 2013..
Integrated Kernel Partitioning and Scheduling for Coarse-Grained Reconfigurable Arrays, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 31, num. 12, p. 1803-1816, 2012.
IcyHeart: Highly integrated ultra-low-power SoC solution for unobtrusive and energy efficient wireless cardiac monitoring. IEEE 12th International Conference on BioInformatics and BioEngineering (BIBE 2012), IEEE Press, Larnaca, Cyprus, 2012..
Embedded Real-Time ECG Delineation Methods: a Comparative Evaluation. IEEE 12th International Conference on BioInformatics and BioEngineering (BIBE 2012), IEEE Press, Larnaca, Cyprus, 2012..
Architectural Exploration and Scheduling Methods for Coarse Grained Reconfigurable Arrays. Università della Svizzera italiana (Lugano, Switzerland), 2011..
Slack-aware scheduling on Coarse Grained Reconfigurable Arrays. Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, 2011..
EGRA: A Coarse Grained Reconfigurable Architectural Template, in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 19, num. 6, p. 1062-1074, 2011.
Heterogeneous coarse-grained processing elements: A template architecture for embedded processing acceleration.. Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09, Nice, France, 2009..
Design and Architectural Exploration of Expression-Grained Reconfigurable Arrays.. Symposium on Application Specific Processors, 2008. (SASP08), Anaheim, California, USA, 2008..
Compiling custom instructions onto expression-grained reconfigurable architectures. international conference on Compilers, architectures and synthesis for embedded systems (CASES), Atlanta, Georgia, USA, 2008..