Giovanni De Micheli

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Full Professor

giovanni.demicheli@epfl.ch +41 21 693 09 11 http://si2.epfl.ch/~demichel/

More information
Please read http://si2.epfl.ch/~demichel/

EPFL IC IINFCOM LSI1
INF 341 (Bâtiment INF)
Station 14
1015 Lausanne

+41 21 693 09 11
+41 21 693 25 64
Office:  INF 341
EPFL > IC > IINFCOM > LSI1

Web site:  Web site:  https://lsi.epfl.ch/

EPFL STI IEL LSI2
INF 341 (Bâtiment INF)
Station 14
1015 Lausanne

+41 21 693 09 11
+41 21 693 25 64
Office:  INF 341
EPFL > STI > IEM > LSI2

Web site:  Web site:  https://lsi.epfl.ch/

EPFL > IC > IC-SIN > SIN-ENS

Web site:  Web site:  https://sin.epfl.ch

EPFL > IC > IC-SSC > SSC-ENS

Web site:  Web site:  https://ssc.epfl.ch

EPFL > VPA-AVP-CP > ECOCLOUD > ECOCLOUD-GE

Web site:  Web site:  https://ecocloud.ch

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Administrative data

Teaching & PhD

Teaching

Computer Science

Electrical and Electronics Engineering
Communication Systems

PhD Students

Costamagna Andrea, Marakkalage Dewmini Sudara, Yu Mingfei,

Past EPFL PhD Students

Aliakbarinodehi Nima , Amarù Luca Gaetano , Baj-Rossi Camilla , Beanato Giulia , Ben Jamaa Mohamed Haykel , Bobba Shashi Kanth , Boero Cristina , Cavallini Andrea , Criscuolo Francesca , De Marchi Michele , Garg Abhishek , Ghasemzadeh Mohammadi Hassan , Ghaye Julien Michel , Ghoreishizadeh Seyedeh Sara , Haaswijk Winston Jason , Ibrahim Aya Mohamed Naguib Ahmed , Lee Siang-Yun , Meuli Giulia , Mozafari Ghoraba Fereshte , Ny Hanitra Mandresy Ivan , Olivo Jacopo , Puppo Francesca , Rahimian Omam Somayyeh , Resta Giovanni Vincenzo , Sacchetto Davide , Schmitt Antunes Bruno , Seiculescu Ciprian , Skalistis Stefanos , Stradolini Francesca , Tang Xifan , Taurino Irene , Tempia Calvino Alessandro , Testa Eleonora , Tzouvadaki Ioulia , Xu Hu , You Dubout Wenqi , Zanini Francesco , Zhang Jian ,

Courses

Design technologies for integrated systems

Hardware compilation is the process of transforming specialized hardware description languages into circuit descriptions, which are iteratively refined, detailed and optimized. The course presents algorithms, tools and methods for hardware compilation and logic synthesis.