Mirjana Stojilovic
+41 21 693 52 98
EPFL › IC › IC-SIN › SIN-ENS
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EPFL IC IINFCOM PARSA
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+41 21 693 52 98
Office: INJ 235
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+41 21 693 52 98
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Infoscience
FRESCO: Efficient Subgraph Enumeration for Scalable Clustering in Heterogeneous CGRAs
2025. 2025 IEEE/ACM International Conference on Computer Aided Design, San Jose, California, USA, 2025-10-26 - 2025-10-30.Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox
2025.ROBoost: A Study of FPGA Logic-Based Power-Wasting Primitives
2025. The 21st International Symposium on Applied Reconfigurable Computing, Sevilla, Spain, 2025-04-09 - 2025-04-11.FRIDA: Reconfigurable Arrays for Dynamically Scheduled High-Level Synthesis
2025. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2025), Monterey, California, USA, 2025-02-27 - 2025-03-01. p. 147 - 158. DOI : 10.1145/3706628.3708880.ROBoost: A Study of FPGA Logic-Based Power-Wasting Primitives. Artifacts
2025.Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox
2025. 33rd IEEE International Symposium on Field-Programmable Custom Computing Machines, Fayetteville, Arkansas, USA, 2025-05-04 - 2025-05-07. p. 143 - 151. DOI : 10.1109/FCCM62733.2025.00060.Parallel FPGA Routing with On-the-Fly Net Decomposition
2024. The 23rd International Conference on Field-Programmable Technology, Sydney, Australia, 2024-12-10 - 2024-12-12.MultiQueue-Based FPGA Routing: Relaxed A* Priority Ordering for Improved Parallelism
2024. The 23rd International Conference on Field-Programmable Technology, Sydney, Australia, 2024-12-10 - 2024-12-12.X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAs
IEEE Access. 2024. DOI : 10.1109/ACCESS.2024.3353134.Electrical-Level Fault-Injection Attacks on FPGA-Based Systems
Lausanne, EPFL, 2024. DOI : 10.5075/epfl-thesis-10315.Practical Implementations of Remote Power Side-Channel and Fault-Injection Attacks on Multitenant FPGAs
Security of FPGA-Accelerated Cloud Computing Environments; Springer, Cham, 2023. p. 101 - 135.GRAMM: Fast CGRA Application Mapping Based on A Heuristic for Finding Graph Minors
2023. 33rd International Conference on Field-Programmable Logic and Applications (FPL), Gothenburg, SWEDEN, SEP 04-08, 2023. p. 305 - 310. DOI : 10.1109/FPL60245.2023.00052.IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck
2023. IEEE/ACM International Conference on Computer-Aided Design (IEEE/ACM ICCAD 2023), San Francisco, CA, USA, 2023-10-29 - 2023-11-02. DOI : 10.1109/ICCAD57390.2023.10323897.The Side-channel Metrics Cheat Sheet
ACM Computing Surveys. 2023. DOI : 10.1145/3565571.RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks
IACR Transactions on Cryptographic Hardware and Embedded Systems. 2023. DOI : 10.46586/tches.v2023.i2.543-567.IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck
2023.Evaluating, Exploiting, and Hiding Power Side-Channel Leakage of Remote FPGAs
Lausanne, EPFL, 2023. DOI : 10.5075/epfl-thesis-9918.A Visionary Look at the Security of Reconfigurable Cloud Computing
Proceedings of the IEEE. 2023. DOI : 10.1109/JPROC.2023.3330729.Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs
Journal of Hardware and Systems Security. 2023. DOI : 10.1007/s41635-023-00135-1.Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs
2023.Active Wire Fences for Multitenant FPGAs
2023. 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), Tallinn, Estonia, May 3-5, 2023. p. 13 - 20. DOI : 10.1109/DDECS57882.2023.10138941.DFAulted: Analyzing and Exploiting CPU Software Faults Caused by FPGA-Driven Undervolting Attacks
IEEE Access. 2022. DOI : 10.1109/ACCESS.2022.3231753.A Deep-Learning Approach to Side-Channel Based CPU Disassembly at Design Time
2022. 25th Design, Automation and Test in Europe Conference and Exhibition (DATE), Antwerp, Belgium [Virtual], March 14-23, 2022. p. 670 - 675. DOI : 10.23919/DATE54114.2022.9774531.FPGA-to-CPU Undervolting Attacks
2022. 25th Design, Automation and Test in Europe, Antwerp, Belgium [Virtual], March 14-23, 2022. p. 999 - 1004. DOI : 10.23919/DATE54114.2022.9774663.Electrical-Level Attacks on CPUs, FPGAs, and GPUs: Survey and Implications in the Heterogeneous Era
ACM Computing Surveys. 2022. DOI : 10.1145/3498337.Deep Learning Detection of GPS Spoofing
2022. 7th International Conference Machine Learning, Optimization, and Data Science (LOD 2021), Grasmere, UK, October 4-8, 2021. p. 527 - 540. DOI : 10.1007/978-3-030-95467-3_38.NetCracker: A Peek into the Routing Architecture of Xilinx 7-Series FPGAs
2021. International Symposium on Field-Programmable Gate Arrays, Virtual Conference, February 28 - March 2, 2021. DOI : 10.1145/3431920.3439285.Shared FPGAs and the Holy Grail: Protections against Side-Channel and Fault Attacks
2021. DATE 2021 Design, Automation and Test in Europe, Virtual, February 1-5, 2021. p. 1645 - 1650. DOI : 10.23919/DATE51398.2021.9473947.Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing
IEEE Access. 2021. DOI : 10.1109/ACCESS.2021.3085005.Are Cloud FPGAs Really Vulnerable to Power Analysis Attacks?
2020. Design, Automation and Test in Europe (DATE), Grenoble, France, March 9-13, 2020. p. 1007 - 1010. DOI : 10.23919/DATE48585.2020.9116481.Built-in Self-Evaluation of First-Order Power Side-Channel Leakage for FPGAs
2020. 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2020), Seaside, California, USA, February 23-25, 2020. DOI : 10.1145/3373087.3375318.Closing Leaks: Routing Against Crosstalk Side-Channel Attacks
2020. 28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2020), Seaside, California, USA, February 23-25, 2020. DOI : 10.1145/3373087.3375319.A Shared-Memory Parallel Implementation of the RePlAce Global Cell Placer
2020. 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems (VLSID), Bangalore, India, January 4-8, 2020. DOI : 10.1109/VLSID49098.2020.00031.X-Attack: Remote Activation of Satisfiability Don’t-Care Hardware Trojans on Shared FPGAs
2020. 30th International Conference on Field-Programmable Logic and Applications (FPL), ELECTR NETWORK, August 31 - September 4, 2020. p. 185 - 192. DOI : 10.1109/FPL50879.2020.00039.A machine learning approach for power gating the FPGA routing network
2019. 2019 International Conference on Field-Programmable Technology (ICFPT), Tianjin, China, December 9-13, 2019. p. 10 - 18. DOI : 10.1109/ICFPT47387.2019.00010.Physical Side-Channel Attacks and Covert Communication on FPGAs: A Survey
2019. 29th International Conference on Field Programmable Logic and Applications (FPL), Barcelona, Spain, September 9 - 13, 2019. DOI : 10.1109/FPL.2019.00039.FPGA-Assisted Deterministic Routing for FPGAs
2019. 2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), Rio de Janeiro, Brasil, May 20-24, 2019. p. 155 - 162. DOI : 10.1109/IPDPSW.2019.00034.Timing Violation Induced Faults in Multi-Tenant FPGAs
2019. Design, Automation & Test in Europe Conference & Exhibition (DATE), Florence, ITALY, Mar 25-29, 2019. p. 1745 - 1750. DOI : 10.23919/DATE.2019.8715263.Development of a Lightning Location System Based on Electromagnetic Time Reversal: Technical Challenges and Expected Gain
2018. 2018 International Lightning Detection Conference (ILDC), Fort Lauderdale, FL, USA, March 12-15, 2018.Deterministic Parallel Routing for FPGAs based on Galois Parallel Execution Model
2018. 28th International Conference on Field Programmable Logic and Applications (FPL), Dublin, IRELAND, Aug 26-31, 2018. p. 21 - 25. DOI : 10.1109/FPL.2018.00011.Parallel FPGA routing: Survey and challenges
2017. 2017 27th International Conference on Field Programmable Logic and Applications (FPL), Ghent, Belgium, September 4-8, 2017. p. 1 - 8. DOI : 10.23919/FPL.2017.8056782.Selective Flexibility: Creating Domain-Specific Reconfigurable Arrays
Ieee Transactions On Computer-Aided Design Of Integrated Circuits And Systems. 2013. DOI : 10.1109/Tcad.2012.2235127.Enseignement et PhD
Current Phd
Rouzbeh Pirayadi, Louis Coulon, Shashwat Shrivastava, Alexandros Poupakis
Past Phd As Codirector
Ognjen Glamocanin, Dina Gamaleldin Ahmed Shawky Mahmoud
Courses
Fundamentals of digital systems
Bienvenue dans le cours d'introduction à la conception numérique et à l'architecture des ordinateurs. Nous allons entreprendre un voyage dans le monde des systèmes numériques, explorant les principes fondamentaux et les concepts qui sous-tendent la technologie informatique moderne.
Information, calcul, communication
L'objectif de ce cours est d'initier les étudiants à la pensée algorithmique, de les familiariser avec les fondamentaux de l'informatique et des communications et de développer une première compétence en programmation avec le langage Python.