Mirjana Stojilovic
EPFL IC IINFCOM PARSA
INJ 235 (Bâtiment INJ)
Station 14
1015 Lausanne
Web site: Web site: https://parsa.epfl.ch/
+41 21 693 52 98
EPFL
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IC
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SSC-ENS
Web site: Web site: https://ssc.epfl.ch
Biography
Mirjana Stojilović received the Dipl. Ing. and Ph.D. degrees from the School of Electrical Engineering, University of Belgrade, in 2006 and 2013, respectively. From 2010 to 2013, she was collaborating with the Processor Architecture Laboratory at EPFL, visiting periodically as a Guest Researcher. From 2013 to 2016, she worked at the University of Applied Sciences Western Switzerland as a senior researcher, and at EPFL as a lecturer. She joined Parallel Systems Architecture Lab at EPFL in October 2016.Mirjana's main research interests span the areas of field-programmable technology, electronic design automation (EDA), and, more recently, electrical-level attacks and countermeasures for reconfigurable hardware.
Mirjana Stojilović serves on the program committee of the FPGA, FCCM, FPL, and DATE conferences and as a reviewer for IEEE TCAD, TVLSI, TC, TEMC, IEEE Access, IEEE TPDS, and ACM TRETS. She is an associate editor for IEEE ESL and ACM TRETS. In 2021, she was on the Best Paper Award (BPA) committee of the FPGA conference. In 2020, she was nominated for the BPA at the International Conference on Field-Programmable Technology (FPT). Mirjana received the Best Paper Award at 2016 International Symposium on Electromagnetic Compatibility (EMC Europe 2016), Young Scientist Award at 33rd International Conference on Lightning Protection (ICLP2016), and the Young Author Best Paper Award at the 20th Telecommunication Forum in Belgrade (TELFOR 2012). In 2015, the EPFL School of Computer and Communication Sciences (IC) presented her with the Teaching Award.
Publications
Infoscience publications
Other publications
Teaching & PhD
Teaching
Computer Science
Communication Systems
PhD Students
Coulon Louis, Shrivastava Shashwat,Past EPFL PhD Students
Glamocanin Ognjen , Mahmoud Dina Gamaleldin Ahmed Shawky ,Semester and Diploma Projects
Contact me if you are passionate about hardware security, FPGAs, design automation, machine learning, side-channel attacks, cloud computing, parallel CPU/FPGA/GPU computing, or embedded system design.Our current project ideas can be found on this link.
These are only some of the topics we'd be happy to work on. If you'd like to hear more, don't hesitate to contact me; I'd be glad to find other topics of mutual interest.
Semester projects and MSc Theses completed in my research group:
2023-24:
- MSc Thesis, Noémie Jacquemot: Investigation of tools for side-channel analysis during design and development
- Simone Andreani: Enhanced power-wasting circuits for fault injection on cloud FPGAs
- Pedro Chaparro: CPU-to-FPGA undervolting attacks: A case study on Zynq-7000 SoCs
- Omar Hammoud: The evolving frontier of hardware fuzzing: Advantages, drawbacks, and emerging challenges
- Patrick Pataky: Remote physical attacks targeting FPGA partial reconfiguration
2022/23:
- MSc Thesis, Amine Atallah: Deep learning-based reverse engineering of sequences of instructions from EM side-channel leakage in ARM processors
- MSc Thesis, David Dervishi: Remote power side-channel analysis of FPGA partial reconfiguration
- MSc Thesis, Majdouline Ait Yahia: Penetration testing strategy to analyze and mitigate vulnerabilities of a virtual bank
- Andela Kostic: Wires as active fences on shared FPGAs
- Stasa Kostic: Voltage-sensor-controlled active fences on shared FPGAs
- Guillaume Boye: Power side-channel analysis using rank estimation and key enumeration
- Matteo Oldani: Exploration of cache-based side-channel attacks in FPGA SoCs
2021/22:
-- MSc Thesis, David Spielmann: Routing delay sensors for remote power side-channel attacks on FPGAs
-- Lucien Bart: Evaluating and enhancing the performance of MetriSCA Library
-- Pierre Colson: Remote attacks on FPGA clock networks
-- David Dervishi: FPGA-to-CPU fault-injection attacks
-- David Spielmann: Power side-channel analysis on remotely accessible FPGAs
2020/21:
-- Anton Hosgood: Titan benchmark suite: From VTR to Xilinx FPGAs
-- Léa Michelaud: Threshold Implementation of a Block Cipher
-- Arthur Passuello: Remote power side-channel disassembly attacks on ARM-based FPGA SoCs
-- Cédric Holzl: FPGA routing with limited crosstalk side-channel attack opportunities
2019/20:
-- MSc Thesis, Hédi Fendri: ML-based side-channel analysis and disassembly of hardware Root of Trust (Recipient of the Omega Student Award)
-- Cédric Holzl: Secure routing against crosstalk-attacks on FPGAs
-- Morten Petersen: Xilinx Series-7 FPGA Routing Architecture Analysis
-- Gaietan Renault: Experimental comparison of voltage sensors on FPGAs
-- Markus Ding: Parallel FPGA Router compatible with VPR 8.0
-- Dorian Ros: Mutual Information analysis of an FPGA implementation of the AES encryption algorithm
-- Mathieu Caboche: GPU acceleration of electromagnetic time-reversal algorithm
-- Sacha Coppey: Design and performance evaluation of dataflow-enabled domain-specific CGRAs
-- Ahmed Ben Haj Yahia: Customizing FPGA Designs using RapidWright
2018/19:
-- Alexandre Abbey: Differential power analysis attack on an FPGA implementation of AES algorithm
-- Robin Mamie: Designing a multicycle processor in Chisel
-- Frédéric Gessler: A shared-memory parallel implementation of the RePlAce global cell placement algorithm
-- Markus Ding: FPGA Trojan for controlled voltage drop injection
-- Ugo Damiano: Step response characterization of FPGA power delivery networks
2017/18:
-- MSc Thesis, Dario Korolija: FPGA-based hardware acceleration of FPGA routing
-- Alex Ferragni: Attack on Altera FPGAs using bitstreams
-- Martin Chatton: Parallel FPGA routing using recursive net-partitioning
Courses
Information, Computation, Communication
The course objectives are to introduce the students to algorithmic thinking, to get them familiar with the foundations of communication and computer sciences and to develop a first set of skills in programming with the Python language.
Fundamentals of digital systems
Welcome to the introductory course in digital design and computer architecture. In this course, we will embark on a journey into the world of digital systems, exploring the fundamental principles and concepts that underpin modern computing technology.