Ties Jan Henderikus Kluter
Web site: Site web: https://sin.epfl.ch
Web site: Site web: https://ssc.epfl.ch
Domaines de compétences
C-based RTL designing
System level designing
FPGA designing
Reconfigurable computing
Micro Controller and Micro Processor architectures
System level designing
FPGA designing
Reconfigurable computing
Micro Controller and Micro Processor architectures
Biography
Since January 2011:Teaching digital systems at the Swiss Federal Institute of Technology, Lausanne Switzerland
Since August 2009:
Teaching responsible for digital systems at the university of applied science of Bern, Bienne Switzerland
2003-2010:
Ph.D. candidate at the Swiss Federal Institute of Technology, Lausanne Switzerland
2002-2003:
Product development team leader in the infotainment group of Agere Systems, Nieuwegein The Netherlands.
1997-2003:
Design Engineer in the design services group of Dedris Embedded Algorithms/Frontier Design BV./Adelante Technologies, Tiel The Netherlands
1996-1997:
Assistant R&D at the faculty of computer controlled systems and computer techniques University of Twente, Enschede The Netherlands
1992-1996:
MSc. education at the Technical University of Twente, Enschede The Netherlands
1988-1992:
Bc. edudation at the Higher Technical School of Groningen, Groningen The Netherlands
Teaching Activity
Course: Design Challenges on Reconfigurable LogicAt: Advanced Digital System Design Oct. 2004
Awards
1997:Awarded TI DSP sollutions challenge as "Top 20" PTM.
Awarded second price in the Dutch DSP innovation challenge
Enseignement & Phd
Enseignement
Computer Science
Communication Systems